Research Activities

Core Technology Ubiquitous Interface Laboratory
 
Network SoC Design
 
- 10G-EPON LSI -
- LSI Design Technology for Ultra-high-speed Optical Communications -
- Cloud Hardware Technology for Streaming -
- Historical Overview of Semiconductor Device Reliability for Telecommunication Networks -
10G-EPON LSI
-SoC design technology for the next-generation high-speed, broadband optical access network-

>>Movie(wmv)

   Technology
This SoC design technology has been developed for the 10-Gbit/s Ethernet Passive Optical Network (10G-EPON), the successor to the GE-PON optical access system now in widespread use. With this technology, most of the communication-control functions can be mounted on one chip thereby enabling high-speed communications to be achieved in compact, low-power equipment. Together with “LSI design technology for ultra-high-speed optical communications” in the optical transceiver section, this is a key technology for achieving a total system.
(SoC: System-on-a-Chip)
 
   Features
The LSI's inner circuits feature dual-rate architecture to support both GE-PON and 10G-EPON processing. The adoption of parallel-processing circuits and techniques like halting/starting the SoC inner clock according to the communications load achieves high-speed, low-power processing.
 
   Application
This technology makes provisions for increases in traffic brought on by the expansion of video services so that network access can be a more pleasant experience for users. It makes for a more economical system by adjusting to increases in bandwidth and accommodating more customers. Additionally, by simultaneously providing customers with both the existing GE-PON service and the next-generation 10G-EPON service, this technology provides for a smooth migration from GE-PON to 10G-EPON. It also contributes to “green communications” by enabling LSI power to be reduced at times of low communications load.
 
 
 
LSI Design Technology for Ultra-high-speed Optical Communications
-10G burst-signal transmission technology makes B FLET'S 10 times faster-
   Technology
This LSI design technology has been developed for optical transceivers of the 10-Gbit/s class targeting next-generation broadband optical communications (10G-EPON). It enables one-to-many, discontinuous burst data to be instantaneously synchronized and received so that the transmission speed of optical circuits between an NTT central office and customers can be efficiently increased. This technology enables services to be upgraded at low cost through a migration process that makes use of existing optical fiber. Together with “10G-EPON LSI” for communications control, this is a key device technology for achieving a total system.
   Features
A burst-mode transimpedance amplifier (TIA) and limiting amplifier (LA) convert and amplify optical signals of various intensities to electrical signals of fixed amplitude. A burst-mode CDR IC instantaneously extracts clock and data signals from the waveform of a degraded data signal that has passed through optical fiber. Performing the above processes at high speed dramatically improves the efficiency of data transmission.
(CDR:Clock and Data Recovery)
 
   Application
The deployment of 10G-EPON will increase the speed of existing optical circuits by ten times for both uploading and downloading thereby enabling more advanced forms of IP-TV services to be provided. It will also enable individuals to act as broadcasting stations capable of sending and receiving uncompressed HDTV video in real time and will contribute to eliminating distances between people by enabling telepresence-type conferencing and remote diagnosis and treatment.
 
 
 
Cloud Hardware Technology for Streaming
-High-speed and flexible image recognition of huge quantities of video streams-
 
   Technology
This is a cloud-type reconfigurable hardware technology that enables real-time processing of huge amounts and various types of video-stream data flowing on the network. It uses multiple field programmable gate arrays (FPGAs) to dynamically reconfigure hardware resources.
 
   Features
  • Enables simultaneous, real-time image recognition of many and diverse video streams by making parallel connections between image-processing circuit blocks (tiles) and adopting scalable architecture.
  • Provides a mechanism for dynamically reconfiguring connection paths among FPGAs so that any type of stream processing (service) can be flexibly changed to another type of stream processing (service) without interruption.
  • Enables the construction of a system using more than an order of magnitude less power and space than existing systems while achieving a level of performance equal to or greater than that of graphic processing units (GPUs).
 
   Application
  • Enables the input of many video streams and the real-time, simultaneous execution of various types of video processing.
  • Applicable to a wide variety of fields, such as monitoring/supervising systems, digital signage, video retrieval, and other types of high-speed video/audio processing.
  • As an actual example of applying this technology, we constructed a real-time object detection system that implements HOG feature extraction and Real AdaBoost identification—computationally intensive image-processing algorithms—in hardware. This prototype used multiple FPGA boards to enable the input of many video streams (720 × 480 pixel, 16 streams/board) and the real-time, simultaneous detection (30 fps) of diverse objects (people, vehicles, etc.) across many streams (10 streams/board).
 
 
 
Historical Overview of Semiconductor Device Reliability for Telecommunication Networks
-Field Data, Prediction Model of Device Failure Rate, and Wear-out Failure Analyses at NTT-
NTT Technical Review, 2013, Vol. 11, No. 5.
 
 


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