December 4, 2002


NTT has developed
"the world's fastest 100 Gbit/s optical communication IC"

-- IC technology that accelerates the existing optical communication speed tenfold --


Nippon Telegraph and Telephone Corporation (NTT; Head Office: Chiyoda-ku, Tokyo, President: Norio Wada) has developed an integrated circuit (IC) for optical communication that achieves 100 Gigabit (*1) per second switching, ten times faster than existing fastest commercial network system. NTT has also successfully achieved electronic signal time division multiplexing (*2) and demultiplexing by applying this IC, that is, NTT has achieved the world's fastest logical processing of electronic signals.
NTT Photonics Laboratories utilized Indium Phosphide (InP), a semiconductor with high electron mobility (*3), to develop a technology that permits the even integration of High Electron Mobility Transistor (HEMT) (*4) circuits with gate lengths of just 100 nanometers (one ten-thousandth of a millimeter). As a pioneer in this field, they invented a new circuit structure that offers 100 Gigabit per second switching, which was said to be impossible for integrated circuit devices to achieve; they have also confirmed its error-free operation (*5).
The developed IC is a multiplexer circuit that converts a lower bit-rate parallel signal into a high speed serial signal by time division multiplexing, and the matching demultiplexer that converts the high speed serial signal to the lower bit-rate parallel signal. This will allow the communication speed of network equipment to be raised by a factor of ten. The data of a 6-hour video (corresponds to 3 DVDs) can be transmitted in approximately one second using one wavelength.


(Background of Development)
Data traffic continues to explode and Terabit (*1) transmission capacity will be required in the near future. One of the technologies that allows more information to be transmitted over one optical fiber is time division multiplexing (TDM). A TDM system that achieves 10 Gbit/s is in practical use, and a 40 Gbit/s system is being developed. The communication speed of a TDM system is limited by the operation speed of the ultrahigh-speed ICs at the core of the optical transmitter/receiver of the network equipment. To accelerate the system, these devices need higher-speed transistors and design technologies that support the implementation of ultrahigh-speed circuits.
Currently, many research organizations throughout the world are trying to develop ultrahigh-speed ICs with the goal of realizing 40 Gbit/s optical communication systems. The error-free operation of a 40 Gbit class IC has already been reported. However, at higher speed region, error-free operation of the ICs has not been reported. No one has, up to now, succeeded in realizing an IC that operates beyond 100 Gbit/s, namely a ten-fold increase over the communication speed of the fastest commercial system (10 Gbit/s). The reasons are: 1) it is difficult to realize a technology that can produce ultrahigh-speed transistors uniformly, and 2) it is difficult for the conventional circuit structure with buffer circuit to realize ultrahigh-speed operation and large output amplitude at the same time.
Against this background, NTT Photonics Laboratories produced world-leading Indium Phosphide designs that achieve outstanding speeds. They matched this with significant advances in device production technology and circuit design technology. The result is that they have succeeded in breaking the 100 Gbit/s barrier, an achievement that IC researchers all over the world have been striving for.


<Points of Technology>
1) Develop the device integration technology that can uniformly produce Indium Phosphide High Electron Mobility Transistors with 200 GHz class current gain cut-off frequency (*6) on one semiconductor chip.
2) Realize ICs that combine ultrahigh-speed operation with large output amplitude through the invention of a new circuit structure that dispenses with the buffer circuit.

The first point is that they have strongly enhanced the Indium Phosphide High Electron Mobility Transistor whose channel is an indium gallium arsenide layer with high electron mobility. They miniaturized its gate length to 100 nanometers, and developed the technology to uniformly integrate them. Indium Phosphide High Electron Mobility Transistors offer very high current gain cut-off frequencies, a dependable indicator of high frequency transistor operation, higher than any other electronic device. Thus they are suitable for high-speed operation. Realizing a multiplexer/demultiplexer IC with 100 Gbit/s performance demands a transistor with a current gain cut-off frequency of around 200 GHz. In addition, all transistors integrated on the same semiconductor chip must have the same threshold of and their drain conductance must be sufficiently lower than their transconductance. NTT Photonics Laboratories developed an extremely regular crystal growth technology that realizes the epitaxial structure with a high degree of accuracy (*7) including an InP gate recess etch stopper layer (*8), and sub-100 nanometer micro gate fabrication technology. This allowed NTT to produce a transistor with extremely high performance and excellent uniformity.
The second point is the acceleration of IC by the newly invented circuit structure. The conventional structure needs an output buffer circuit to drive the output driver circuit. Therefore, the speed of the whole circuit is restricted by the characteristics of the output buffer circuit. To avoid this restriction, NTT found a way for the IC to directly drive the external load (*9) by the selector core part. This elimination of the output buffer circuit is a major source of the speed enhancement. In addition, they adopted the peaking technique (*10) in selector core part so that the bandwidth can be further enhanced; error-free operation is now possible at 100 Gbit/s. This multiplexer IC realizes ultrahigh-speed operation while achieving the large output amplitude of 1V, so it is expected to have broad applicability.


<Future Progress>
Through their research advances, NTT has succeeded in electrically multiplexing/demultiplexing a 100 Gbit/s signal. They intend to continue with their efforts to achieve higher processing speeds and even more advanced implementation technologies; the way is now clear to further enhancement and cost down of a broadband network which will enable the smooth transmission of contents such as high resolution video data and voluminous design data sets.
Details of this technology will be presented at IEDM (International Electron Devices Meeting) to be held in San Francisco, California, U.S.A. from the 9th to the 11th at of December.


<Glossary>
*1 Gigabit, Terabit: The bit is the unit of binary signal information. 1 Gigabit corresponds to one billion bits, and 1 Terabit corresponds to one trillion bits.

*2 Time division multiplexing: The method of combining information on the time axis. The bits sent over the transmission are offset in terms of time and the timing of the bits is used to extract them at the far end. The wavelength multiplexing method, by comparison, uses different optical wavelength to carry different data streams over one optical fiber. The trend in ultrahigh-speed optical communication systems is to combine both methods.

*3 Electron mobility: A yardstick of how mobile the electron is in a semiconductor. As electron mobility increases, the electron's speed in the transistor increases and the switching operation is accelerated.

*4 High Electron Mobility Transistor (HEMT): An electric field effect transistor that controls the number of electrons in the two dimensional electron gas formed in the channel layer of a high-purity semiconductor by using a gate consisting of Schottky metal.

*5 Error-free operation: The operation with zero error rate, which is defined as the result of dividing the number of error bits generated within the IC by the total number of input signal bits after a logical comparison of the IC's input signal and output signal.

*6 Current gain cut-off frequency: One of the indicators of a transistor's high frequency performance. It is defined by the frequency at which the current gain of the transistor equals 1; as this value increases, the switching operation of the transistor is accelerated.

*7 Epitaxial structure: The structure consisting of multiple interleaved semiconductor crystal films grown on a semiconductor substrate.

*8 Gate recess etch stopper layer: The semiconductor layer inserted into an epitaxial layer beforehand. This etch stopper layer isn't touched by the etching solution; it enables the realization of uniform FET threshold voltages.

*9 External load: The load connected to the IC. Most high-frequency circuits assume that the characteristic impedance will be 50 .

*10 Peaking technology: The circuit technology that uses resonance to improve the high-frequency characteristics.




For further information, contact:
Minako Sawaki, Hirofumi Motai
Planning Division
NTT Science and Core Technology Laboratory Group
Tel: 046-240-5152
E-mail: st-josen@tamail.rdc.ntt.co.jp



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